Test Method - BoundaryScan
The ongoing miniaturisation in the development of electronic devices allows for more and more functions to be integrated on less and less space. Thereby the access to all nodes of the circuit, as needed for the classic ICT, becomes more and more difficult if not impossible.Between the gates of the component and the connectors to the outside, additional gates are neccessary for serial reading and writing of data.
BoundaryScan according to IEEE 1149.1 is the ideal solution to perform a comprehensive and automatic generated test of the device, despite the limited access. Thereby there will be less or even no costs for a test fixture. Also this method offers great advantages for the development when it comes to the initiation of the board, as there are normally not yet any diagnoses tools in use to detect short circuits or open solder joints.
In an ideal case all digital components of an PCB are boundary scan compliant. As described in IEEE 1149.1 a four-wire-bus stimulates and scans the test cells inside the component. In this ideal case only 4 connectors would be needed to test the whole PCB.
In practice PCB are rarely full boundary scan compliant. But even partial solutions can save a lot of test effort and neccessary contacting for the ICT, if test methods are combined.
Nail fixture without Boundary-Scan
Reduced number of nails by use of Boundary-Scan (virtual nails)
